1. Technical Field
The embodiment described herein relates to a semiconductor memory apparatus and, more particularly, to a buffer of the semiconductor memory apparatus.
2. Related Art
A buffer in a semiconductor memory apparatus serves to amplify, compare, or transmit signals.
The buffer circuit that performs the roles is implemented as first to fifth transistors P1, P2, and N1 to N3 in the form of a current mirror as shown in FIG. 1.
In the case of the buffer circuit, a voltage level of an output signal ‘outb’ is determined depending on whether a voltage level of an input signal ‘in’ is higher or lower than a level of a reference voltage ‘Vref’. For example, the buffer circuit outputs the output signal ‘outb’ of a low level when the voltage level of the input signal ‘in’ is higher than the level of the reference voltage ‘Vref’ and outputs the output signal ‘outb’ of a high level when the voltage level of the input signal ‘in’ is lower than the level of the reference voltage ‘Vref’.
Since the buffer circuit determines the voltage level of the output signal ‘outb’ by comparing the voltage level of the input signal ‘in’ with the level of the reference voltage ‘Vref’, a level transition temporal variation of the output signal ‘outb’ is generated depending on variation of the level of the reference voltage ‘Vref’. More specifically, when the level of the reference voltage ‘Vref’ increases, a large amount of current is supplied to an output node node_A that outputs the output signal ‘outb’, such that a transition section of the output signal ‘outb’ is shortened and when the level of the reference voltage ‘Vref’ decreases, a small amount of current is supplied to the output node node_A, such that the transition section of the output signal ‘outb’ is lengthened. If the input signal ‘in’ is a clock signal, a problem in the transition section variation of the output signal ‘outb’ becomes more serious.